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Negative timing checks and negative delay annotations are different things.
Synopsys VCS has two switches (-neg_tchck VS. -negdelay) for negative timing checks vs. negative delay annotations.
Hi
We are at the process of simulating a gate level post-route verilog netlist using ncsim. We see a few INTERCONNECT information in the sdf file that shows negative delay.
While elaborating we get the following warning code (SDFNDP):
An attempt was made to annotate a negative delay value or...
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