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The "direction == 0" didn't work but i tried "direction == 1" and i got the input pins and i tried "direction == 2" and i got the output pins.
So the solution is,
get_pins -filter "direction == 1" -of_objects [ get_cells "name_of_cell" ]
Thank you all for the help.
DustHerder.
You are sure of that? i tried like this get_pins -filter "direction == in" -of_objects [ get_cells $cell ] and get all pins. And gave me this Error: Type mismatch between 'direction' and 'in' .
Hi guys,
I find this command get_pins -of_objects [ get_cells $cell ] but this give me the all pins of the cell, i want only the inputs pins, any suggestion to solve this ?
Regards,
DustHerder
Hi guys,
If I select a net in a verilog module, is it possible to find the primary inputs that my net depend in DesignCompiler?
I already tried the report_transitive_fanin but i have registers in my circuit and this command have a problem because the fanin report stops at the clock pins of...
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