Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I have the book "Radio Frequency Integrated Circuit Design " and uploaded onto the EDAbook upload section of this forum two days ago. But my post was deleted yesterday. Since it's my first time uploading book to this forum, I don't know what's wrong. Can someone tell me the reason so I can...
What is transfer fuction
The transfer function of a system is a relation between output of the system and input of the system. It can be in time or frequency domain. It can be relation between voltage-voltage, voltage-current, current-voltage, and current-current. Transfer function can be...
Simple question on FSK
1. Could you explain in more details about why choose BW = 2*(df+R/2) or BW = 2*(df+R) depends on "1. The frequency shift compared to the symbol rate."
2. Did you mean that if there is no low pass filtering before modulation, then we should use BW = 2*(df+R)? Normally...
chipcon cc2400 in rf
Hi, Guys:
Does anyone has experience on Chipcon CC2400 chip? We copied CC2400 reference design precisely and tried to transmit data at 1Mbps but got packet loss of 1%-5% even at 1 meter. Our packet size is 10 bytes and RF output power is 1mW. Does anyone know why the...
Simple question on FSK
Hi, guys:
I have a question about bandwidth of FSK.
In text book about FM, the bandwidth FM can be calculated by Carson's Rule: BW = 2*(df + fm) where df is the maximum frequency deviation and fm is the maximum bandwidth of modulating analog signal.
But for FSK, some...
When design a opamp you also need to consider the DC voltage level balance. In order to get the same voltage swing on output as that on input, the DC voltage level should be the same.
Therefore the second stage of opamp usually has the functionality of DC voltage level shifting. This means if...
Re: Why we use MOS family?
Physically speaking, BJT is minor carrier conducting device and CMOS is major carrier conducting device.
BJT has its own advantages such as higher gain and higher current driving capability.
Re: FPGA
If you search the www.Xillix.com or www.Altera.com websites, you can get some information. To understand the internal structure, you need some knowledge of digital circuit. To be able to use FPGA, you need to learn VHDL or verilog hardware programming languages.
cpld as rom
It seems that the input of CPLD's cell uses the configurable OR plane and the input of FPGA uses the LUT. Of cource, the gates counts of FPGA is much larger than CPLD.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.