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Hi Satya,
It's a real case met in my work, but i can't understand so well about this..
The truth is the clock period is very bigger than the setup&Hold timing.
When i measured this timing on the tester with real chip...
It must be Low or High.. but not be "unstable" ---
Let's example with...
Maybe it's not clear of this question,
I need to find out the violated condition of setup & hold time.
But i found these two conditions maybe the same results,
I shift the input data edge close to the clock sample edge till failed condition met.
then i measured the timing. -> assuming that...
Hi satya,
So what you mean both of these two kinds of vioaltion are the same results -- output signal unstable... sometimes delayed sometimes not.
But if i want to measure this setup time and hold time on the tester,
Pattern passed firstly, then i'll shift the input data edge close to the...
Hi all,
One question: if there's one hold time violation, what's happened on the output waveform?
If setup time violated, output of register will be delayed one cycle. i'm confused by this hold violation..
See my attached waveform!
Hi ,
On Windows, you also can practice this PERL.
Try google it, and i have ever used it..
More important thing is what you needed to simplify in your work or in your life..
:o
xilinx select installation options
Hi artem,
After download .sh file successfully,
run sh *.sh under this directory, and there's pop-up windows of steps of Installation.
There'are following errors in the terminal, and the install going on.....
after 100% installatoin finished. there's a error...
xilinx authentication rejected
Hi all,
Firstly, i downloaded the 8_1_03i_lin.zip from www.xilinx.com website
and its size is about 130M.
130224509 03-30 01:04 8_1_03i_lin.zip
then unzip this file to run ./setup
but it appear one dialogue box which needed one installation directory.
it was...
Hi ,
I prefer to install FC5 into my box, but i'm not sure whether modelsim for linux can run with it normally.
Could you give me any ideas?
Thanks a lot.
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