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Recent content by drk15

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    Capacitor charging/discharging equation, maths

    Thank you very much. It is clear now. I made mistakes while doing this on my own.
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    Capacitor charging/discharging equation, maths

    Hello, Thanks you all for your responses. here is more on my question. I am going through this(attachment) I dont get how it goes to vN(t) = K e -t/RC step. Thank you
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    Capacitor charging/discharging equation, maths

    Hello, Can anybody explain me the capacitor charge/discharge equation derivation in detail? Places I check, they start at either complicated point or in other easier version, some of the steps are omitted. Any pointers/ links will be helpful too. Thanks.
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    Generating sine wave for testbench in systemVerilog

    Hey, Thanks a lot FreeMAn0110 for your reply. You are right, the problem was about the time units. I just replaced sine_out = offset + (ampl * sin(2*pi*freq*$time)) with sine_out = offset + (ampl * sin(2*pi*freq*$time*1e-12)) and its working now. Thanks a lot. :)
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    Generating sine wave for testbench in systemVerilog

    Hello All, I am trying to generate a sine wave with frequency 5GHz with 0.5V offset and 0.3V amplitude. This is what I do. // Testbench `timescale 1ps/10fs import "DPI" pure function real sin (input real rTheta); module testbench; // Declarations parameter sampling_time =1; const real pi =...
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    Generating sine wave for testbench in systemVerilog

    Hello All, I am trying to generate a sine wave with frequency 5GHz with 0.4V offset and 0.4V amplitude. This is what I do. // Testbench `timescale 1ps/10fs import "DPI" pure function real sin (input real rTheta); module testbench; // Declarations parameter sampling_time =1; const...

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