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Recent content by dragon_boat

  1. dragon_boat

    Ask about the timing in FPGA...

    you can divide ur frequence by n num. for example , 50M / 10 = 5 M , so it is easy to do that by using counter.
  2. dragon_boat

    Looking for a good SystemC tutorial

    SystemC Tutorial okey.now i am studying it.
  3. dragon_boat

    ModelSim SE 6.0 and systemC

    i want to know too. Added after 4 minutes: does this ver6.0 support systemc? other's version?i never don't use it.
  4. dragon_boat

    FREE 8051 IP Core from Oregano

    hi everyone: Are there someone who use altera device to do this?
  5. dragon_boat

    How to design a DDS with AD9858?

    c36crpx connector yeah, now i read the datasheet carefully. in addition, i download a demo sch , in the sch there is a chip(C36CRPX). please tell me it is which kind of chip ? i can't search this chip in google. 3x
  6. dragon_boat

    How to design a DDS with AD9858?

    i want to design a dds wiht 9858.but it seem diffuicult to do that. have anybody do this with 9858?
  7. dragon_boat

    Sigma Delta Modulator problem ?

    please read the document for reference. it come from xilinx web.
  8. dragon_boat

    [discuss] How to detect a feeble singal with wavelet?

    thanks very much!! u are so a good-hearted man,thanks again.
  9. dragon_boat

    [discuss] How to detect a feeble singal with wavelet?

    thanks for dora,but which kind of signals can be better solved using wavelet?
  10. dragon_boat

    [discuss] How to detect a feeble singal with wavelet?

    now i want to find out the singal , fd , except fft,what about wavelet analysis?
  11. dragon_boat

    [discuss] How to detect a feeble singal with wavelet?

    with my minds in a haze . model in matlab： fs = 1000; A = 3; B =1; f1 = 200; fd = 30; noise = 30; t = 0:1/fs:5; data_len = length(t); u = A*cos(2*pi*f1*t) +B*cos(2*pi*(f1+fd)*t)+noise*rand(1,data_len);
  12. dragon_boat

    Is there any way to control the pll of the FPGA on the fly?

    i think u can generate different frequency output inside,but control by interface or switch outside.
  13. dragon_boat

    Looking for information about various FPGAs

    which FPGA is better? now i use @ltera FPGA,stratix. i am a beginer.i feel its is easy to use .
  14. dragon_boat

    Devide frequency into 3 using AHDL or Verilog HDL

    who can decompress the file? i use winrar3.
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