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tie on cell
Tie Hi and Tie Low cells are used in the first place where the gate of the standard cell has to be connected to either power or ground. Now it is never recommended that the gate be connected directly to power and ground nodes directly as with supply glitches can damage the damage...
Re: take spice analog netlist for digital simulation purpose
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Thanks
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The complete flow is being developed with opensource edatools at www.rtl2gates.com. You can post any specific projects under the misc section of the forum at www.rtl2gates.com
-D
There is a decent document posted at www.rtl2gates.com under Design Topics section.
Also this is a online discussion forum hosted by veteran EDA engineers. You can get quick replies to your answers about Design flow issues.
-D
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