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SynaptiCAD's WaveFormer Pro can sorta do this. You can create a timing diagram by drawing waveforms and by writing Boolean equations to describe the waveforms. When exporting to VHDL, the drawn waveforms will look like test bench code. But the waveforms with Boolean equations will look like VHDL...
SynaptiCAD has a Verilog to VHDL translation tool that can be found at https://www.syncad.com/hdl_translators.htm . It is not free, but they have 1-day leasing that you can purchase. They also provide translation services for those that don't want to learn all the differences in the languages.
SynaptiCAD has a VHDL to Verilog translation tool that can be found at https://www.syncad.com/hdl_translators.htm . They also provides translation services for those that don't want to learn all the differences in the languages.
Re: VERILOG --> VHDL
SynaptiCAD has VHDL to Verilog and Verilog to VHDL translation tools. They can be found at https://www.syncad.com/hdl_translators.htm . Several comments have mentioned that the translation tools produce messy results, mostly because there is not a one-to-one correspondence...
SynaptiCAD is giving away a free, “no strings attached” 6 month licenses for VeriLogger Extreme, a high-performance compiled-code Verilog simulator.
The press release is at:
https://www.syncad.com/pr_verilogger_extreme_free_2009.htm
SynaptiCAD is now the US and Canadian distributor for HDL Works EDA tools: Ease, HDL Companion, and IO Checker. These tools provide alternative graphical approaches for VHDL and Verilog code design which also complement SynaptiCAD's timing diagram editors and graphical simulation tools. EASE...
SynaptiCAD released a new version of their V2V translators. They now have Verilog 2001 support and a Graphical Debugger. The tool translates VHDL models into Verilog models, and also Verilog models into VHDL models.
The press release is on...
If you are having trouble converting or viewing TRO files (because support for this format has been dropped by one of the most commonly used TR0 viewers), try using SynaptiCAD's WaveFormer Pro product. It is a timing diagram editor that can display both analog and digitial waveforms and is now...
Timing Diagrammer Pro is a timing diagram eiditor that lets you draw and analyze timing diagrams for digital and analog designs. This version includes over a dozen features to improve the customization, imaging, and visualization of timing information. After 14 years of continuous development...
You can always try a graphical testbench generation tool to create your VHDL, Verilog or SystemC models. That way the model structure and connections are automatically created, and you just have to worry about the actual test data.
SynaptiCAD's TestBencher Pro creates test benches multiple...
SynaptiCAD has several different timing diagram editors available at www.syncad.com
1) Timing Diagrammer Pro - is the least expensive and lets you draw and analyze timing diagrams. It supports full min/max timing analysis. It also lets you copy and paste vector diagrams or bitmaps into Word and...
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