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Recent content by dominoeff

  1. D

    Bandgap Startup circuit needed , with voltage limited devices

    I will try these way later. Thanks guys and Happy new year 2012. Dominoeff
  2. D

    Current and voltage matching of transistors

    For better maches, Like this
  3. D

    Bandgap Startup circuit needed , with voltage limited devices

    Thanks. And when the input voltage is 23, to protect the device i may need 3 or more serious diodes ,but they do not work when the input voltage is 5.5. What a terrilbe process!
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    Bandgap Startup circuit needed , with voltage limited devices

    Thank you, Varunkant2k. I've consided many architectures including what you have provided. And the problem is my voltage limited devices .Many circuits are OK, if the input voltage is not high ( such as vin=5.5 ~10),but when the input goes higher , some of the MOSFETs or the BJTs will break down...
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    Bandgap Startup circuit needed , with voltage limited devices

    Thanks varunkant2k and sorry for my poor writing.This band gap circuit is designed for my internal regulator to provide a reference voltage.The regulator , which is a LDO, will power my IC."Its better you provide constant voltage supply to band Gap circuit" does it mean i should use the output...
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    Bandgap Startup circuit needed , with voltage limited devices

    In my process ,MOSFETs Vgs should be less than 5 ; BJTs Vbe should be less than 5 and Vce <10. Dominoeff
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    Bandgap Startup circuit needed , with voltage limited devices

    Thanks varunkant2k: The core circuit is as below in core.png.I may change the BJT in red rectangle into a high voltage MOSFET.I also need a circuit to bias the current source in red ellipse.At first I want to use a BJT to mirror the current of Q3, and a P_MOSFET pair to mirror this current to...
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    Bandgap Startup circuit needed , with voltage limited devices

    Hi Guys: I am working on a bandgap circuit for a internal regulator in a DC-DC converter. The core circuit is a simple BROKAW bandgap circuit and i need a startup circuit for it.The problem is the input voltage is from 5~23 and the high voltage MOSFET my process provide have a max Gate-Source...
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    Why Super source follower AC response shows it have a pair of conjugate poles?

    Thanks saro_k_82, Now i know something about how this happen,but there is still something confuse me . Why i can't find this by using small signal model of FET .For the considered frequency is not very high the terminal inductance is ignored like FvM said.But i think...
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    Why Super source follower AC response shows it have a pair of conjugate poles?

    Thanks FvM, If I understood correctly,it's a 100% feedback by M1. If we open the loop at source of M1, the circuit is a two stage amplifer, two common source amplifer stage.Now we connect the Vout to M1 source ,the equal input voltage is Vin-Vout,which means the feedback factor...
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    Why Super source follower AC response shows it have a pair of conjugate poles?

    Thanks LvW, The source follwer circuit is attached , and the 2rd picture is the AC simulation result by hspice. I just using MOSFET small signal model to analyse the circuit.I can only find two real poles at the gate of M2 and Vout respectively. I want know...
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    Why Super source follower AC response shows it have a pair of conjugate poles?

    Hi guys: I am using a super source follower to enhance my driver's slew rate.but it cause my circuit oscilation,AC simulation shows the super source follwer gave conjugate poles,by my analysis,it get two polses but should not be conjugate poles ,could anyone explains this for me!
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    need a start-up circuit for high voltage design?

    Thanks to ****_freebird The RC circuit is used to delay the gate voltage rise of pMOSFET when power is on.The delay time shuold be choosed that when it is large ,the gate voltage rise too slow ,it cause a large Vgs of the pMOSFET that will destory the device, and when it's small there will be...
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    need a start-up circuit for high voltage design?

    Thanks.But my power supply supply has a range form about 5.5 to 30.when the power voltage is low,serveral diode-connected MOSFET can't work.I try a RC circuit to delay the gate voltage of the pMOSFET,so can keep the pMOSFET active some time to rise the gate voltage of nMOSFET.It works but when...
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    need a start-up circuit for high voltage design?

    hi guys: i use a simple Vbe reference circuit to bias my circuit,but it need a start-up circuit.In my process both high voltage nMOS and high voltage Pmos have a limited gate-source voltage Vgs<5 V, though the drain-source voltage can be 30V. what kind of circuit should be a...
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