Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Okay in common power clamp for esd protection NMOS transistor is commonly used as Pull-Down of ESD current from VDD to VSS rail. I wonder if PMOS transistor can replace NMOS transistor in this situation?
I wonder why not PMOS is used as shorting component between VCC and GND rather than NMOS which gate is connected to inverter chain?
Does anyone have an idea?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
