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Recent content by dinnu

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    Static Timing Analysis

    Hello can anyone tell me how to select set up time, hold time , rise time , fall time. This is basically depends on the technology you are targetting you need to see the basic element there its given min/max/typical based on that you can choose like eg, for taget technology of 0.18u the mux...
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    The difference between simulation and synthesis

    simulation and synthesis Hello The difference between simulation and synthesis is simple Simulation is nothing but what ever expected logical functionality checking in Hardware world, with out considering the actual timing issues i.e net delays and ckt delays where as synthesis is actually...
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    Help me with my Verilog code that concatenate data bits

    need help with verilog Hello you can just write as MCirqMask <= {cntDataIn[7:5], 1'b1, cntDataIn[3:0]}; Thanx and Regards Dinnu
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    Specman based questions

    specman questions Hello any one has worked on the specman i have questions, i am using vr_ad eVC i have defined the register file for the specific memory space, and i am defining the registers drving sequence and i have defined the register in more file which are all there in the register...
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    Firmware uploading in an ethernet device

    Hello There are various ways by which firmware could be programmed As per discussions going on here, 1) Flash 2) JTAG 3) External Host some time 4) Ethernet port 5) Rapid IO etc but you need which way the programm is 3)

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