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Recent content by dhruvabedre

  1. D

    Body connection or body terminal for FinFET

    Hi, Does FinFET has got body connection or body terminal? Thanks.
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    DRC and LVS check using Synopsis ICC tool

    Thanks a lot hyun5226!
  3. D

    In CMOS, why circuits are built on p-substrate?

    Thanks a lot for the explanation dick_freebird!
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    In CMOS, why circuits are built on p-substrate?

    Hi, In CMOS technology why always the circuits are built using nmos/pmos on p-substrate but not on n-substrate?
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    DRC and LVS check using Synopsis ICC tool

    Hi, Can I do physical verification(PV like DRC & LVS) using Synopsis ICC tool? If yes, please help me on how can I do it(with the help of pdfs, videos, ppts). Thanks,
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    Digital IC chips & Analog IC chips

    Re: Digital IC chips & Analog IC chips Thanks a lot ads-ee! And next time I will post in appropriate section.
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    Can NIMP(N-implant) be overlapped with PIMP(P-implant)

    Thanks a lot erikl! - - - Updated - - - Thanks a lot rangermad!
  8. D

    Can NIMP(N-implant) be overlapped with PIMP(P-implant)

    Hi, During layout(example CMOS inverter), can NIMP be overlapped with PIMP? As shown below. Thanks, Dhruva
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    Digital IC chips & Analog IC chips

    Re: Digital IC chips & Analog IC chips Hi cyrax747, Thanks a lot for your reply! And I have got one more question: Coming to the ASIC, is it specifically for digital chips or what? If ASIC is specific to do only one kind of functions like codec or Bitcoin mining, then what are other chips...
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    Digital IC chips & Analog IC chips

    Hi, For digital IC chips, the design is written in HDLs. Then what about analog IC chips? How it's designed(I think HDLs can not be used for this). Please help me in this. Thanks in advance. Dhruva
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    layout/stick diagram for 2 input NAND gate with 2 fingers

    hi, can any body please draw me a layout/stick diagram for 2 input NAND gate with 2 fingers? thanks in advance.
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    LDO Feedback Resistor LVS error

    Hi all, I am using Synopsys Galaxy Custom Designer for layout editing & IC validator for verification. I was doing layout for feedback resistor of LDO, but I am getting the LVS error which is "Schematic block performs series or path merging but contains no power or ground nets." "Layout...
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    Equivalent logic function

    Thanks andre_teprom:smile:
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    Equivalent logic function

    hi guys, please can you help me with the equivalent logic functon of the given circuit which is in attached file. I am confused about it. Thanks in advance
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    Inverse of Boolean Function

    hi guys, what is the Inverse of the function, F3 = (A + B C)' + D thanks in advance
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