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Recent content by deveshkm

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    Series of diode connected transistors

    How is current determined in the branch if all transistors are diode connected? Is it possible to determine the VGS across each of them, esp if it is possible that any of them could be in subthreshold
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    Inverter based power on reset

    PFA the screenshot of the schematic
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    Inverter based power on reset

    Why are two diode connected transistors used in inverter based Power on reset? Reference: Low cost low power POR circuit for low voltage sensing using adaptive bulk biasing Authors: Manoj Kumar Tiwari and Mohd Rizvi 2016 11th International Conference on Industrial and Information Systems
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    Hysteresis in comparator

    What will be the output waveform if the output can switch when Vin becomes more than lower threshold Vin becomes less than upper threshold Consider input Vin rises from 0 to Vdd?
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    [SOLVED] Difference in designing opamp as amplifier and comparator

    What is the difference in designing opamp as amplifier and comparator?
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    [SOLVED] Power on reset and power okay circuits

    What is the difference in POK and POR?
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    [SOLVED] Power on reset and power okay circuits

    Hi, I need to know working of POR and POK circuits Standard POR seems to be a comparator Can there be multiple POK within one POR? Please provide some references Thanks
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    Current mirror in subthreshold

    Hi, I am designing a differential amplifier for Vdd=1.5 to 1.7 V Input is PMOS In order to meet the specifications over PVT and icmr I biased diff pair in subthreshold. However, due to limited headroom I reduced VDSAT of tail MOS by biasing in subthreshold I have obtained sufficient bias margin...
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    Impact of ESR on charging profile of load capacitance

    With small step input , there won't be any slewing The capacitance must charge exponentially What will be the impact of large capacitance and ESR on charging profile Cap is of the order of nano Farad and resistance in milliohms Capacitance with ESR has been modelled by cap in series with...
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    Impact of using different devices in the design

    For obtaining more gm/Id from the differential pair in subthreshold , is it possible to use other devices All devices are from same foundry. Is it feasible to fabricate such design?
  11. D

    Two stage amplifier with large load capacitance

    Current limit 200uA. Slew rate 2 V/ms I don't understand power amplifier using MOS
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    Two stage amplifier with large load capacitance

    Input swing 10m Unity gain frequency 75kHz
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    Two stage amplifier with large load capacitance

    For 68 dB gain and load cap = 40 nF , First stage is folded cascode For second stage , should I design class AB amplifier?
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    Technology node and min channel length

    From the brief survey on internet, I have come across a definition of technology node: The half pitch distance between the metal 1 layers **************** Further, for TSMC 65nm , the min. length is 60 nm Till 250 nm node, the process node would be the min length possible. Please clarify if...
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    Calculating transit frequency of mosfet

    Hi, What is the tesbench used for characterization of ft of MOSFET? Ft requires short circuit current gain but how much current should be at the input?

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