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Sorry.........
don't have any idea of CORDIC implementation.
I suggest if you want to verify your code then do co simulation in MATLAB.
I hope you will find your way out.
If you are implementing it in FPGA then first run your module in MATLAB.
See the output of osk modulator for m ary number = 2.
You will get a complex number.
I gave fixed binary number for real and complex values of '1' bit and '0' bit.
Tell me if you need more clarification. I suggest to...
Thanx for the suggestion amraldo...
I tried opencores but they do not have much to say...
edaboard has more threads on BPSK discussion than any other has, thats y i asked here.
I want to implement BPSK modulator and demodulator in verilog on spartan 3 kit.
If anyone has done that on any fpga, i request your guidance...
I know the concept that for transmitting '0', we send the sinusoid as it is and for '1' we add 180 phase shift to the sinusoid.
I request guidance on...
I want to implement BPSK modulator and demodulator in verilog on spartan 3 kit.
If anyone has done that on any fpga, i request your guidance...
I know the concept that for transmitting '0', we send the sinusoid as it is and for '1' we add 180 phase shift to the sinusoid.
I request guidance on...
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