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Recent content by denexp

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    How to fix Cadence relocation error ( after updating from RH 9 to SuSe10)

    cadence in suse10 Can u b more specific plz?
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    Problem of install cadence 5033 & 5141 on SUSE10

    The thing is that after i install IC 5.0.33 (no USR's at all) i get an error about symbol errno and things like that. What can i do to run IC on SuSE without probs?
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    Cadence RC 4.1 RTL Compiler environment variables....

    rc tools 4.1 Can please someone help?
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    Cadence RC 4.1 RTL Compiler environment variables....

    cadence rc ....i want to set up the above software on linux. Can anyone tell me which are the environment variables to set it up? Thanx in advance.
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    libgen command not found....

    I sent an email to Cadence. They kindly replied(in less than a day) and told me that i need the SEV32 bundle, which contains VoltageStorm,QX and libgen.
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    libgen command not found....

    I use SuSE 9.0. There is no libgen_util_applet as you mentioned. Where can i find it and install it? EDIT: I found using YAST that it is provided by gnome-panel, which i installed but still nothing. The thing is that as i can understand libgen is an executable and not a library or something...
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    libgen command not found....

    .....Hi there. I am trying to run the scripts for TurboEagle(provided by cadence). I am at the stage of Physical Implementation using SOC. The thing is that at some point i get the following error " libgen : command not found" . I checked it and saw that a tcl script invoked the command...
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    Buildgates and Verilog-XL problem...

    set path cadence verilog Thx for the solution. It worked just fine. But now i came up with another problem. The thing is that i got the error i posted above when i was trying to execute the "verilog -f $sim_dir/sim_no_lps.opt" command in a shell box. Now that i tried to execute the same command...
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    Buildgates and Verilog-XL problem...

    cds_root: not found ....Hi there.I have this annoying program. I am running all my IC software on a SuSE 9.0 machine. I am trying to run the low power synthesis tutorial of buildgates (run_no_lps.tcl). When i reach this line of the script "verilog -f $sim_dir/sim_no_lps.opt" i get the following...

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