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Thank you cl10greg!
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If I use RF transceiver, could anybody recommend the RF transceiver that is suitable for my application?
I see TI, ADI and SiliconLabs have such RF transceiver, but I'm not sure if they are suitable.
Hi, all
I'm going to develop an application of wireless audio. The diagram is as follows:
Audio mother and several audio children are placed in a house, the distance between them is ranging from 2 to 10 meters, they may be isolated by walls. Audio mother is like a call center, and always...
I think RS232 and RS485 coding is not the same, because when coding for RS485, you should manually switch between the transmitter mode and receiver mode by setting relevant signal lines.
if you want to communicate multiple MCUs utilizing RS485, you can take a look at MODBUS. Hope it will help you.
I'm new to altera's PLD chips and its developing software----quartus ii 3.0. I've been using xilinx's ISE for a year. I think ISE is better than Quartus in most aspects. A troublesome problem I encounter using Quartus is the simulation using modelsim. Quartus ii 3.0 alleges it can support and...
Hi,all:
I use a CPLD (XC9572) and an FLASH ROM to config the FPGA XC2S50 and the configuration mode is slave parallel.For the first time I succeede,the FPGA works well.But for the seconde time,the FPGA is damaged.
I have some questions as follows:
1. Is it necessary that PROG pin going...
clkdv_divide
Hi,all:
I'm using Xinlinx Spartan II FPGA (XC2S50) for my design.The design flow is XST Verilog.To get a 1/16 frequency of the main clock,i use the DLL,but the DLL's default divide ratio is 2.0,so how to change the parameter CLKDV_DIVIDE? I use the code as follows:
defparam...
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