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Recent content by debasish_deka

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    Map : 116 - The design is empty. No processing will be done

    Thanks for these important tips :-)
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    [SOLVED] Difference between <= Relational operator and <= Non blocking assignment

    Thanks Tricky Dicky, Then how'll this code behave if(a<=b) d<=a; Actually I am from microcontroller programming background. To me it seems like (a<=b) evaluates to TRUE always and finally the value of b goes to d. Am I right?
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    [SOLVED] Difference between <= Relational operator and <= Non blocking assignment

    Hi All, I am very new to verilog and got confused between the Relational operator <= (which is less than equal to) and the Non-blocking assignment operator <=.:bang: I want to know how does the verilog compiler know that the variables on the either side of this operator means assignment...
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