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Recent content by damdam23

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    ASIC Design - die size reduction lead to how much business profit

    Thanks jbeniston, I am sorry am not completely verse with the cost calculation per die. I will try to put up the info I have below: Original die size = 100mm^2 new die size = 99mm^2 (1% saving) technology node = 28nm (dont know the wafer cost) manufacturer = TSMC (could not find the cost details...
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    ASIC Design - die size reduction lead to how much business profit

    Hi, I am working as an ASIC design engineer and wanted to know how much profit in terms of $ a company makes on die size reduction, let's say by 1mm sq? The technology node used is 28nm. Can anyone point me to some docs/articles around the same? Thanks
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    Verilog : Use of 'PARAMETER while declaring signals,instantiations,etc

    Hi, I am trying to understand a piece of Verilog code as below: module_name instance_name ( ..... .signal1(signal1_local['SIGNAL_WIDTH - 1 : 0]), .... ); or in wire [`SIGNAL_WIDTH - 1 : 0] signal1; I am not able to understand the 'SIGNAL_WIDTH , why is the apostrophe (') used here? Can...
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    modualtion of .txt and .wav files

    hello, i hav 2 make a communication system set up... one of its jobs is to modulate a selected .txt or .wav file. i am facing a problem on how to digitise this file and pass it to a 'Callback' function of a button and also how the modulated signal is saved as .wav file ... pls help thanx

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