Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
The pole-zero properties of common-source amplifiers are introduced in Chapter 6.2 of Razavi's <<Design of Analog CMOS Integrated Circuit >>. The book explains why zero points occur:
"
CGD provides a feedforward path that conducts the input signal to the output at very high...
Hello，everyone！The Short-Open-Load-Thru(SOLT) de-embedding procedure is commonly used in Vector Network Analyzer(VNA).
Usually this procedure was preformed automatically inside the VNA after "Short","Open","Load","Thru" status has been measured.
Now I need to realize SOLT de-embedding procedure...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
