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Recent content by cyrabbit

  1. C

    Parameterized Analog Cells question

    you should set CDS_NETLISTING_MODE to analog
  2. C

    Who can tell me how to design memory?

    Could you please share me the two books?
  3. C

    How to translate device model file from hspice to spectre?

    spp spice I have seen a perl scrit spec2sp.pl from Nassda that can translate spectre netlist to hspice netlist.
  4. C

    IC5 Installation Procedure for RedHad 9.0

    cannot exec icfb.exe file see you Path setup,or you should source your .cshrc file
  5. C

    Is Verilog-XL included in IC5033 package?

    Re: IC Cadence and LDV 3.0 Verilog_XL is in In IC443,but in IC50 or later,Verilog_XL is apart,you need LDV package
  6. C

    Nanosim easy document

    nanosim tutorial you can just see tool's manual.It has a tutorial.
  7. C

    Is DRC rule: Metal3 overlapping with VIA2 necessary?

    Re: DRC Rule for Metal3/VIA2 Yes, it will be fill by Metal3
  8. C

    will 64 bit system support mentor and cadence product

    Yes,it's OK.I install cadence in 64 bit solaris8
  9. C

    Mentor IC-Flow & Cadence IC5033

    icflow mentor I think IC is better,there are many third parth tools support it
  10. C

    Problem about Cadence IC5.0 in Redhat8.0

    Re: Thanks for your help IC50 only support english verision linux
  11. C

    Dracula LVS says "Segmentation Fault"

    Which version of your DRACULA?update to lastest version.
  12. C

    Which tools should I use to generate Cadence PDK?

    Re: PDK tools Yes, I have got that tool. I want to know if there are foundry use it really
  13. C

    LPE to generate spretre netlist?

    Which tools can I use to generate spretre netlist?DRACUL@?
  14. C

    which tool can support verilog-A simulation?

    C@dence spretreHDL
  15. C

    How to change file time attribute?

    But how can I change the Directory and Files together?
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