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you are provieded with sram.gds2 file .i imported the entire gds2 file.and i have to tell th e max avaliable information regarding the sram eg : which tech?
,no bits?,layers, any thing
hai to all,
i have a basic doubt.if wanted 2 i wanted to communicate two microcontrollers using CAN protocal.I should choose microcontrollers which is having can protocol in it. if i wanted to of with FPGA .can i find a CAN IC separately or with FPGA it comes
Re: latch up?
generation of a low impedance path in CMOS chip between power supply & ground due to interaction of the parasitic pnp and npn bi-polar transistors.
thses BJT form a silicon -controlled scr rectifier with+ve feedback & virtually short the power rail to ground this causes high...
Re: CPLD and FPGA
for the student purpose cpld is sufficient and it all depend upon the gate count of u r design and u should be in a position to estimate the gate count one flip flop will take 3-4 gates
how to make a fpga
hai,
before choosing the FPGA u should know what type of FPGA your using,ie sram ,anti fuse or flash etc..generally everybody will using only sram based fpga.and from the date sheet u should find on what are the voltages applied on fpga normally three voltage for xilinxs...
Re: clock gating?
hai,
simply way of understanding the clock gating is data should control the clock.ie.....
if u take a normal flip-flop with enable (e) pin.the whole flip flop is controlled by the by this enable pin.this is called clock gating.this type of technique is used to save the...
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