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Recent content by chuggington

  1. C

    Issue with power vias / power stripes in a block (sram) in encounter

    Thanks Shobhit , for your response. I did try out the first option u suggested , but it doesnt work out in this case either. Let me look up the option of custom vias , I havent worked on that till now . Regards, Anjana
  2. C

    Issue with power vias / power stripes in a block (sram) in encounter

    Hello , I have got an issue with power routing in cadence encounter. I am working on a design which has a couple of srams in it. The srams are defined as class block in the lef and has pins that span the entire block. Power stripes do get created across the block when i run the command , but i...
  3. C

    Need info on Bond Pads and Bumps

    Thanks Hakeen !
  4. C

    Power Routing issue in SoC Encounter

    I am currently facing the same issue. How did u resolve it ?
  5. C

    MTECH/MS Program in VLSI Design

    IBM Microelectronics has this option too.
  6. C

    How to check rules and solve violations in SoC Encounter?

    To add to what pamm2020 and hairo said, u can try running checkDrc too in encounter , before u export the GDS to calibre.
  7. C

    Need info on Bond Pads and Bumps

    Thank you ,Hakeen. This did give me a good idea about bumps . I have a couple more of doubts too .Would the bump be specified in the synthesised netlist or is it something that would be put on after the physical design part of the chip is done ? I have bond pads which should be kept close to...
  8. C

    Need info on Bond Pads and Bumps

    What is the difference/relation between a bump and a bond pad ? Any information or document on this would be much appreciated. Regards, C
  9. C

    How to place bond pad

    One more question - Did you route this using Fcroute ? In my case this is not a flip chip, would i still have to use Fcroute ?
  10. C

    How to place bond pad

    I got the netlist with the bond pads in it. I am not yet able to place it correctly. This is what I have done so far :- 1. Edited the IO Pad lef to include PROPERTYDEFINITIONS PIN bondPadOuter STRING ; PIN bondPadMiddle STRING ; PIN bondPadInner STRING ; PIN ioCellOriginX...
  11. C

    How to place bond pad

    Thanks again, rca. I would be getting the netlist today and l'll try out your suggestions. Hope you dont mind if I post back again if I encounter any issue.
  12. C

    How to place bond pad

    Rca , Is this valid for the placement of bond pads next to the IO pads too ? In my case, I neednt place the bond pads on top of the io pads. do you mean that generally for any sort of placement for the bond pads, we need to modify the LEF? ---------- Post added at 09:46 ---------- Previous...
  13. C

    Bond Pad Placement in Cadence Encounter

    Thanks, I found that. have asked you a query there.
  14. C

    Bond Pad Placement in Cadence Encounter

    No suggestions ?
  15. C

    Bond Pad Placement in Cadence Encounter

    This is going to be the first time I am working with bond pads. the design calls for the placement of the bond pads next to the IO pads. Can I just write a script like I do for IO placement to place the bonds too ? Or is there an entirely different command used that actually links a bond pad to...
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