Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by chrisnonso

  1. C

    Urgent Help for Matlab code

    Hello everyone, I am currently writing a trading algorithm on matlab and I have encountered a road block. This is really urgent as it is my project due on Wed. and I need to graduate on the 16th of this month. So urgent inputs and contribution will be greatly appreciated. Thanks in advance...
  2. C

    help required in matlab code

    Hi, am sure you must have solved this threshold problem already. I was wondering if perhaps you can help me with mine am having a similar problem with an algorithm am working on and since am fairly new to matlab am having difficulties. I have this stock data am working on doing some time...
  3. C

    Walsh code generation using VHDL on FPGA board

    I want the VHDL code to give results of a walsh code of length 8. In otherwords u0, u1, and u2 are user controlled such that if the code is correct then when u2u1u0 in that order are as follows I should get the following result: walsh code 1: u2 = 0 u1 = 0 u0 = 0 then my result should be...
  4. C

    Walsh code generation using VHDL on FPGA board

    URGENT!!! FOR PROJECT! Hello everyone, I posted a problem I am currently having with my project using VHDL on FPGA. I am using Altera DE2-70 board with Quartus II 9.1 web edition. I have worked more on the problem and now it synthesizes and simulates however I am not getting the expected...
  5. C

    Walsh code generation using VHDL on FPGA board

    I am using Altera Quartus II
  6. C

    Walsh code generation using VHDL on FPGA board

    Hello all, Please I am trying to design a walsh code of length 8 on FPGA using VHDL codes. I am using 2 T-flip flops, 3 AND gates and 1 OR gate to implement this design. I have been unsuccessful and really need some help as I am new to using VHDL code language. What I have so far shown below...
See more

Part and Inventory Search

Back
Top