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I do agree with sutapanaki
Currently I am using 0.35um SIGE. The Foundry provides high perfomance npn whose ft is up to 40GHZ.
But I have a headache problem, for a specific npn. If I only have a current budget of about 100uA for each emitter follower and differential pair. I would choose a...
I think Mohem may me ok if you do not need the value very precisely.
Generally speaking, you can use MOS as a resistior. You can look for TIA's AGC design for reference.
My previous design has a pair of source follower output pins. Unfortunately it's ESD immunity in human body mode can only pass 1KV. The experiment result shows that the nmos to vcc fails. Is there any one to give me a guide .
Our design uses TSMC 0.35 polycide, and the nmos follows ESD design...
CMOS technology
For o.5um/0.35um opamp design, I am taught to choose L>1um. I am wondering if it is ok to use a smaller L in 0.13um or 0.11 cmos technology design?
Level shifter
It is quite interesting to read the low-voltage to high voltage level shifter . But I meet a problem. I need to design a 1Gbps to several Gbps PECL output buffer, the traditional source follower's efficiency is too low . Is there any good alternative choice?
hspiced in ade
I try to run direct hspice simulation (hspiceD) in IC5033 of Linux version. However warning occurs after
start simulator if needed....
..successful
*warning*The current hspice simulation will not be run. The hspice simulator
on Linux might not be able to write psf...
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