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Recent content by cheelgo

  1. C

    Verdi Training with labs for your best

    training book novas verdi Good material, thanks, cheelgo!
  2. C

    chip level verification plan - what's the big deal?

    very good idea indeed, now the verification become the bottleneck of the SoC design. thanks a lot!
  3. C

    Can anyone explain me the concept of Guard Rings

    GUARD RINGS that's not hard to handle!
  4. C

    Y cant me add rom into mbistarchitecture

    is just the rom location/ 1,0, google it.
  5. C

    how to implement CDMA protocal in ASIC?

    systemview cdma this is not simple question, it is kind of big project.
  6. C

    Why do we define set up and hold time?

    set up and hold mostly is to avoid data metastability in brief!
  7. C

    Need application specification of SPRAM

    SPRAM which kind of SPRAM you need? spec or ?
  8. C

    Reg: Onsite VLSI jobs

    check the job hunting website or contact the headhunter
  9. C

    so lower dft coverage, why?

    dft_drc in dft mostly the controllability and observability cause problem. you could try to report scan chain cell. what I impressed is that some part of design is not correctly inserted into scan chain.
  10. C

    FSM rtl coding techniques for a pipelined datapath?

    pipelined datapath that also includes memories?
  11. C

    How to choose the best job offered?

    job offers choosing Ask the question list by Salama is quite good!
  12. C

    About asynchronous FIFO and dual-port SRAM

    the blog is quite good! waiting for your post update!
  13. C

    How to increase test coverage in TFT

    where did you pulse the clock, from internal or from external.
  14. C

    cells with less drive strength

    Logical effort that is good book for reference. thanks anssprasad.

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