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Recent content by cdrguy

  1. C

    comparisons between PLL and DLL

    anyone could tell me the merits and shorcomings of PLL and DLL? which one is easier to lock in a very short time, say, within 50ns?
  2. C

    ask about the comparisons between LC VCO and ring VCO

    i want to learn from you about the comparisons between LC VCO and ring VCO, regarding their merits and shortcomings. is LC VCO easier to get higher frequency?
  3. C

    any suggestion on the abstract level simulation of PLL?

    i want to simulate PLL in abstract level. also, i want to get the simulation result similar to that of circuit level simulation. that is to say, i want to save the time and space of the simulation, while preserving the precision. any suggestion on that? at least, i want to simulate the phase...
  4. C

    problem of VCO in PLL?

    i think when you zoon the control voltage, you can find the ripples.
  5. C

    Need help for capacitor layout

    would you like to use mimcap? you can use pcell in cadence to generate mimcap.
  6. C

    bulk contact for RFIC design

    i think you can change the transistor model to include the substrate network when simulating in schematic. for the post-layout simulation, i have no idea how to simulate its effect. the extracted view from Diva only contains the model of nch and pch, even not RF model.
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