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Recent content by captab

  1. C

    Crystal oscillator frequency Vs Amplitude

    TI run the simulations in spectre I need to use the maxtime step option in Spectre. Generally what should be the value of this? Does this number affect the amplitude, period jitter etc?
  2. C

    Crystal oscillator frequency Vs Amplitude

    I want to do a AGC loop where I start with maximum current and adjust the current till the amplitude is set to known voltage. Is it possible to support the wide of range of shunt and load capacitance combinations this way ? Can there be a case that oscillator may not start at maximum current but...
  3. C

    Crystal oscillator frequency Vs Amplitude

    For now if we neglect the effect of Rds, will the ampltiude Vs Current graph be monotonic or it will also be bidirectional as in the case of negative resistance Vs gm
  4. C

    Crystal oscillator frequency Vs Amplitude

    Thanks. As you said, the negative resistance plot is a bidirectional plot meaning it has one max value and if gm increases more, the negative resistance value decreases. Now say I have designed the crystal with current I1 for which I get 0.8*MaxNegative resistance and then for another current...
  5. C

    Crystal oscillator frequency Vs Amplitude

    Thanks. I do see your point, but here your negative resistance calculations are done without taking into account the impact of crystal parasitic cap.With that, I see that negative resistance increases when load cap is increased for my frequency of interest.But from amplitude control perspective...
  6. C

    Crystal oscillator frequency Vs Amplitude

    I am simulating a crystal for an amplitude target of say 300mV. For crystal parasitic cap of Cp and load Cap of say Cload, I require say Ix amount of current. Now for same Cp, I have made Cload as 1.5*Cload.If I look at the negative resistance number, I get a larger negative number, but for same...
  7. C

    Crystal oscillator frequency Vs Amplitude

    Thanks. Is there a way, we can predict the ampltiude at drain since I am planning to regulate the drain amplitude through AGC.I mean even if we evaluate the Gate waveform, how can we say what will be the amplitude at drain for perticular gat waveform.Is this all have to be done through simulations?
  8. C

    Crystal oscillator frequency Vs Amplitude

    Thanks. You mean to say the fundamental ftrequency will change due to nonlinearities or are you talking about jitter.If the fundamental frequency is getting changed, then as I raised the question to start with, will the frequency vary Vs ampltiude and also without any amplitude control. Also how...
  9. C

    Crystal oscillator frequency Vs Amplitude

    Thanks.Now suppose I run the AGC across process (Nominal,Slow,Fast) and the ampltiude controlled is same for all the process, do you expect the magnitude of current that current source provides will be the same across process or it can differ.If possible, can you please provide more explantion...
  10. C

    Crystal oscillator frequency Vs Amplitude

    If I use a pierce crystal oscillator with common source amplifier and I regulate the current source(AGC) to control the amplitude of oscillation, will I get same or different frequencies for different amplitudes (set through AGC).For all the amplitudes set, the crystal parameters remain the...
  11. C

    LDO PSRR for Low VCO jitter

    Hi, I am using a VCO delay cell whcih swings from VDD to VDD-Vgs in process of generating a delay.Now If I want to use a LDO as supply for this VCO, how do I decide upon the PSRR of the LDO? Thanks.
  12. C

    Incremental Sigma Delta ADC

    Hi, Need input on Incremental Sigma Delta ADC.Suppose Vref=1.0V and I need 10-bit.In this case, the minimum converion time is 1.024mS considering 1MHz clock.Can I achieve the same 10-bit resoultion using say 100MHz if there is no restrcition on Power or in general what decides the maximum...
  13. C

    Grounds in SVR - switch ground different than rest or not?

    Grounds in SVR Hi, I am working on DC-DC step down current mode converter with integrated switches.For this, is it necessarry to have the switch ground different than rest of the on chip Analog ciruits? Thanks, Captab
  14. C

    CUrrent Sesning Issue- problem when the offset is introduced

    CUrrent Sesning Issue Hi, I am working on Peak Current Mode DC-DC converter.I am using OPAMP based current sesing technique to sense the High side switch current when the switch is ON.The technique seems to work very well until the offset is introduced in the OPAMP.Due to this, the loop...
  15. C

    Switch layout techniques for SVR

    Hi, Are there any good references for switch layout for SVR. I am using peak current sensing technique for the SVR and its accuracy is dependent upon the matching of the Main switch to sense switch.Also the efficiency too is dependent upon the parasitics. Please point me to the good layout...
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