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Hi,
i'm working on this simple circuit to understend better poles and zeros.
**broken link removed**
I wasn't interested in the bias point so T1 is in triode region and T2 in saturation region.
V4 has AC magnitude of 1 V, so i plotted Bode diagram of the output.
**broken link removed**...
Sorry, i try ti explain better. If my opamp is in unity gain configuration the transient current in the capacitor reaches only for one istant the value Iss, so during the input ramp, the capacitor doesn't charge with Iss (because this value is reached only for one instant). I know theory so i'...
Thanks for the answer. The point is that Iss is reachead only for an istant after there the balancing between the currents of the differential pair. So, i can t say CL is charged by Iss, cause this is true only for an istant. Instead, if i use open loop configuration, i can see the theorical...
Hi,
i've designed a CMOS folded cascode opamp to have a SLEW rate of 150 V/us (Iss of the differential pair is 30 uA and CL = 200 fF) in unity gain configuration. I found that ICL is about 1 mA.I saw current in the differential pair is unbalanced in one branch only for a very quick time so the...
Hi,
I woulgd know what is your operative method to design cmos circuit. For example Allen Holberg is a good book for opamp design, but in the "real world" we don't have kn or lambda or VTH0...So, what's your method?
For example for a differential stage, you try with parametric simulation knowing...
Re: Sbreak error
I dont understand the first answer. Maybe i had to see i m using capture.
My problem isto creare a delaied version of signals outing from a circuit. Please help me
Added after 27 minutes:
NOw it says :
Model IO_STD used by X_U1.U1 is undefined
PLEASE HELP ME
Added...
Sbreak error
Hi i had a problem when i use the controlled voltage swith sbreak.
The simulation is aborted because:
"Model Sbreak used by X_S1.S_S1 is undefined"
If i try to open pspice model it says "the sbreak model is not found in current libraries."
What can i do? Thanks
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