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Doh, never mind... figured it out, hadn't mapped the MemOE pin in the UCF file. Stupid mistake, lesson learned. The originally posted VHDL code works fine.
I'm bumping this, hoping for any clue as to what could be wrong. I've tried everything I can think of, can't get anything sensible to happen and no idea what to try next.
Hi,
First post here and completely new to fpga, please be gentle :)
I'm trying to teach myself a bit about FPGA's and have read a bunch of books, done a few experiments with a Nexys 3 board, even managed to get the T80 (Z80 cpu) core up and running, but have now hit a brick wall.
I'm trying...
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