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Recent content by brito.tb

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    Correct offset and gain error Multi-ramp integrator ADC

    Hi, I'm projecting an ADC to my graduate project and facing some dificulties in remove the offset and gain error. Can you explain me how to remove these errors? It's a 8 bit ADC and in the figure is the conversion. Thanks,
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    [SOLVED] Help in the choice of a switch.

    I redesign the OTA like you said and the result is much better. But I have another question. How can I start the integration from 0 V? Thanks.
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    [SOLVED] Help in the choice of a switch.

    Re: PMOS input OTA's ICMR includes GND I used an OTA with the PMOS input and the result is the same. When I use VCM the configuration of integrator works, but if I use GND don't. Using a rail-to-rail OTA, I'll obtain success in to achieve the desired result? Thanks.
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    [SOLVED] Help in the choice of a switch.

    Re: PMOS input OTA's ICMR includes GND I'll try using a PMOS input then. Thanks for the tip.
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    [SOLVED] Help in the choice of a switch.

    I'm using this configuration of the OTA: And using this OTA, connecting the positive input and the switchs to gnd I have this: And using this OTA, connecting the positive input and the switchs to vcm I have this: If I use an OTA with the input PMOS can I use GND instead of VCM to...
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    [SOLVED] Help in the choice of a switch.

    I'm using a NMOS input. So, if I use a PMOS input it should work with the grounded positive input? Or should I use the VCM = 1.65V?
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    [SOLVED] Help in the choice of a switch.

    But I'm simulating the circuit in this configuration and isn' t working. But if I replace the ground in the switchs and in the positive input for the VCM 1.65V it integrates. There is something wrong with my Folded-cascode OTA? Or this is the correct?
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    [SOLVED] Help in the choice of a switch.

    Hi guys, thanks for the answer. I misunderstood the functionality of the switch. Now I now how it works. And I have another question, if the amplifier used in the figure has the VDD = 3.3V and VSS = 0V, can I connect the positive input to the ground and the circuit still works as a integrator...
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    [SOLVED] Error in Cadence Analog Enviroment

    I add a opamp macromodel from the functional library of cadence to my schematic. The model's parameters are setted by default, and the last parameter is 'macro name=f_op1v1c'. The schematic is simulated in Analog environment, but an error is given that X0 is an instance of undefined model of...
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    Error in Cadence Analog Enviroment

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    Understanding the design of a folded cascode OTA

    Hi guys, I still have some troubles in the design. I made the circuit like this: * * Component pathname : $MGC_WD/ota_cascode_dobrado * .subckt OTA_CASCODE_DOBRADO VO VDD VI+ VI- VSS .CONNECT VSS VSS .CONNECT VDD VDD MN3 N$39 N$39 VSS VSS n L=2u W=52u MP5...
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    Understanding the design of a folded cascode OTA

    Thanks for the answer BradtheRad, but my really doubt is about how to calculate the bias voltages like Vnb1, Vnb2, Vpb1 e Vpb2. I already calculated the sizes of the transistors following the book of Allen. But there isn't explain how to calculate the bias voltages. Anyone knows how to?
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    Understanding the design of a folded cascode OTA

    Hi, I am studying how to design an OTA, as reference I am using the book CMOS Analog Circuit Design from Allen. But I have some questions that isn't explained in the book. How can I calculate the bias voltages showed in this figure? Thanks
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    Design of analog MOS switch

    Thanks to everyone for the help, but I have some questions. In every book I read, says that is the way to design a switch and never show this "error". How can I size the transistors to avoid this? And make V(OUT) as close to 0V when V(EN) is 0V? I need this switch to make this circuit: Thanks
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    Design of analog MOS switch

    Hi, I am trying to design an analog switch in the technology TSMC 0.35. But I am with some difficulties. My VDD is 3.3V and VSS is 0V. My design is this: And the response to the stimulus are this: What am I doing wrong? Because I want to the V(OUT) goes to 'Z' when the V(EN) is 0V. I'll...
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