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thanks but what are that tools which supports mixed languages.....
---------- Post added at 12:22 ---------- Previous post was at 12:21 ----------
As i have to call this code inside my verilog code .....how can i do that..
this is not my home work .....its just piece of work used in my project ,i did this coding in vhdl but i dont know verilog ..as i have to call this code in my top module code which is in verilog.......
so i have to convert my this code to verilog.....
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
entity PowerControl is
port (
Clk : in std_logic;
Reset : in std_logic;
ms : in std_logic
-- xbus_hw_idct enable bit
pse_m : out std_logic);
--IDCT switch and isolation control power shut off...
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