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Recent content by Black Jack

  1. Black Jack

    Variant-aware Orcad Capture TCL PDF generation

    For example, Replace path in design cash. TCL provided with OrCAD not work, and hangs OrCAD. Sometimes work - but delete symbols from page.... Really crazy thing.
  2. Black Jack

    Variant-aware Orcad Capture TCL PDF generation

    Hello, Could you share this TCL, please. I`m very interesting TCL scripts for Cadence... Does anyone can share useful link with TCL-files for Cadence/OrCAD, please?
  3. Black Jack

    xilinx synthesis problem

    It means, that you should provide you VHDL code that to you have helped.
  4. Black Jack

    Clipped sinewave clock

    Using clipped sin oscillator directly is incorrect 1) slow edges 2) 0.8 Vp-p Output You need use additional external circuits. See attachment.
  5. Black Jack

    timing analysis for DDR2 designs?

    Look at Mentor Hyperkynx.
  6. Black Jack

    HyperLynx 8.1.1 (Xilinx S6_GTP_SIS_KIT_1_1_ELDO Modelling Problem)

    Hello! I try to model GTP_RefClk.ffs project from s6_gtp_sis_kit_1_1_eldo under HyperLynx 8.1. When I start modelling with digital oscilloscope I have a error message. See attachment, please. I think that problem with s6_gtp_sis_kit_1_1_eldo\HL_projects\S6_kit.ini or...
  7. Black Jack

    [SOLVED] Generate 15-harmonics cosine wave with different phase shifts

    You mean 15 harm of one frequency shifted? If yes then you can use 1) DDS-techniques, DFF`s delay taps for produce phase shift and adders tree for final calculation. 2) Table approach - counter and memory. Memory hold pre-calculated output waveform values
  8. Black Jack

    Xilinx Document Navigator

    DN realy cool app! Now you don`t need for browse and explore documents jungle. All document that you need will store locally on you HDD and updated with newest version. You can update, search, open docs directly from DN. Try it!
  9. Black Jack

    Xilinx Document Navigator

    My FPGA Blog: Xilinx Document Navigator is Live P.S. It`s NOT my (Black Jack) blog really:?
  10. Black Jack

    SPARTAN-6 LXT Power Data (maximum rating)

    Hello. Thank you. I familar with Xilinx power estimator, but I develop board like "development board" and don`t have any data about end user application that will be running on board. So I need maximum rating for power.
  11. Black Jack

    SPARTAN-6 LXT Power Data (maximum rating)

    Hello! I develop board based on Spartan-6 and now impossible to know how Spartan-6 will used. I need to develop power supply for maximum power consumption. Could you point me to document about SPARTAN-6 LXT Power Data (maximum current value) for VCCint, VCCIO, VCCpll, etc., please? --...
  12. Black Jack

    Spartan-6 and DDR3 MIG Interface

    Hi See **broken link removed** under "Reference Designs". There are lot ref. des. (including MIG) -- Regards, Jack
  13. Black Jack

    What is an IBIS model and how to simulate it using Cadence tools?

    Re: IBIS Model **broken link removed**
  14. Black Jack

    FPGA PCI board with 3.3v/5v connector. How possible?

    Actually I use 2xCBTD16211DGG and 1xCBTD3306PW. (50 PCI signals) List of chips I copy from my old post from other site. I`m sorry for mistake. See for "Ruggedstone1" board for reference schematic for PCI. http://www.enterpoint.co.uk/raggedstone1/RAGGEDSTONE_CUSTOMER_COPY.zip But they have a...
  15. Black Jack

    FPGA PCI board with 3.3v/5v connector. How possible?

    My list of solution for PCI buffering that I compose sometimes ago: IDT: 1) QS34X245Q3G -32 Bit/QVSOP-80 2) QS3861PAG - 10 Bit/TSSOP-24 3) QS3384PAG - 10 Bit/TSSOP-24 3) QS32X861Q1G - 20 Bit/QSOP-48 4) QS32X384Q1G - 20 Bit/QSOP-48 5) QS3306AS1G 2 Bit/SOIC-8 Faichild: 1) FST16211MTD - 24...
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