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thanks for your reply.
would you advise how to do that 'generating tech file form GDS'? it is my first time dealing with GDS file that is not attached to a standard tech process
Hi,
Can I import and read GDS file into Cadence Virtuous without a tech file?
The GDS I got is for a nonstandard nmos process, so there is no tech file I can associate with. Any idea how to be able to read this file in cadence?
btw, I imported the file using a stream file in CIW, attach the...
Thanks for your reply, you’re always helpful
The issue here is that I’m not sure whether the open PDK 130nm by skywater can be used in Cadence, I saw many folks using it with Magic Klauout ..etc but not cadence
Hi,
Anyone used skywater 130nm PDK in Cadence virtuoso environment? if yes, would you guide us how to start installing this PDK and using it in Cadence.
attached here a quick block diagram. RF+ and RF- need to be generated by the BALUN and passed to two rectifiers (with high impedance), matching circuit will be designed to match the rectifier input with the Balun impedance. So, I understand from your comment that I only need to take the two...
Hi,
I want to design a PCB circuit that receives 1GHz from an antenna through SMA connector and convert the RF signal to differential outputs RF+ and RF-.
Basically, I have SMA connector (50ohms) followed by BALUN (to provide differential output signals: RF+ and RF-), PCB will be fabricated...
thanks all for your helpful comments and interesting discussion.
to clarify more, the signal of interest is changing from 40MHz to 100Mhz in about 3-5MHz range. It is very weak in amplitude (few hundreds of uV to few mV), I am thinking to use fast comp as a first stage to overcome the issue of...
thanks
how I can the divider for high frequency and btw this is a sinusoidal signal.
I thought of the 555 timers or couple of flip flops but they may not be good for high frequency like 100MHz, right?
Hi,
Looking for possible ideas to convert high frequency signals (~100MHz) to voltage. Any suggestions?
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Also, is there any commercial ICs can do this? I found only few with max of 1MHz! Usually, Frequency to voltage (FVC) is the in range of few tens of kHz
thanks and I appreciate your help, looks like these are gate drivers.
I want to build some current sources and buffers in transistor level circuits. I want to confirm the results using ready made transistors, I don't want to take the IC layout route at this stage. It's just a proof of concept...
Hi,
I am looking for an IC that has quad MOSFET transistors (or higher) with all terminals available for external connection.
Something like: ALD210808, but here the body is always connected to source. I want the body to be also connected to an external pin.
Thanks
Hi,
Beta of BJT is Low when Ic is low. Then, it increases as Ic increases but after some Ic value, Beta starts to fall down. why is that?
I tried to simulate this in LTspice using 2N3904 BJT by ploting Beta vs Ic, it seems Beta always decreases!!
Any thoughts? it came to my mind that the...
yes, that's my concern but this is the only DRM document I have been provided.
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I asked them and they advised me that they don't do it even for 0.5um process!
I am thinking to go ahead and submit and wait for the manufacturing review, hoping they ask for detailed corrections
still don't know what is the document you are pointing to ? is it Design Rules manual? I attached the Design rule document for SCMOS which I already read, and there is no information about the dummy filling requirements. There is only a minimum density rule which I attach also here. Does this...
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