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2-bit fulladder
thx guys everone but it didnt work
@saurabhs i tried your way but again answer is a(1) b(1) not used
@vijayiyer i ve thought like mux_master
@muxmaster your site is very helpful but i cant deal with hiearchical design why we use [4:0] in sum instead of [3:0] like a or b??
if i...
Hello everyone,
im newbie in here and this is my first question. here we go
this is a two bit fulladder homework for ise xilinx
when im trying to test with UUT i see summary 0 is ok but summary-1(s0 s1) is that Z because of never used a1 and b1
whats wrong with it?
note:this code works for 1...
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