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Thanks for ur reply..
In UJT operation (block diagram i attached), When the DC supply is given, it will not trigger UJT first, the capacitor initially charged to peak point (vp), it only triggers the UJT... Why UJT is not triggered by the DC supply..???
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In UJT operation...
what is the difference between coupling and a normal capacitor? Why the input is given to capacitor and then to transistor in a circuit? When the capacitor is connected to the input it will charge.. then how the input is given to circuit?
Re: Ic design and layout
Thanks for ur reply... In my intreview i was asked "How a diode is reduced to this much less size ".. Do u Know the answer for it??
I am doing my project in VLSI domain..For that, i am in need of SLANSKY adder.. I want to know the structure of slansky adder... and is it possible to implement in transistor level??? Can anyone help in this regard??
In Primary winding of the transformer, When we give 230V as the input, the stepped down output voltage will be obtained at the secondary winding of the transformer which will be given as the input for the rectifier circuit. I don't Know what voltage we will get at the secondary winding to be...
I am doing my final year M.E project....For that i have drawn a 4x4 wallace tree multiplier and simulated using microwind 3.1. I have got a correct output in Schematic simulation in DSCH2.But, When i create a verilog file for that and Compile in Microwind 3.1 and create a layout, in the layout...
Thank u.....Sir,I have designed a 4 x 4 wallace tree multiplier using my designed full adder, but when i simulated using Microwind 3.1, i am not able to find the delay associated with it..Do u have any idea regarding this???
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