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Recent content by beeflobill

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    Waveform Generation Language (WGL) Specification?

    I'm working on a project where I'm trying to generate WGL files. I have a few WGL files generated from another tool as examples. But, it would be really nice to have a spec or reference (or anything) which I can read to explain the format. I don't understand why the information on this is so...
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    Trouble inserting level shifters with upf and design compiler

    The tool support person gave a name to my pain, "heterogeneous fanout". They said it's a "real pain". He pointed me to some documentation on it, but it wasn't much. I've been coping. I've found that the only way to really handle this is to go back to the RTL and manually split the ports...
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    Trouble inserting level shifters with upf and design compiler

    I'm working with Design Compiler and UPF to insert level shifter and isolation cells into a design. I have two power domains. I'm having problems inserting level shifter cells. The issue is when there is a driver with some of it's fanout in one domain and the rest of it's fanout in the...
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    Development of aloha (asynchronous) system for wireless node discovery in Matlab

    The question is so broad that it's unanswerable. Generally speaking, the idea of simulations is that they approximate reality. That is all they can do or else they become reality and they would run very slow. There will always be things that you don't model in a simulation! How you choose to...
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    audio processor sta321mp inquiries

    This is all in section 5 of the data sheet. The I2C protocol is used to set and read the registers. - - - Updated - - - I'd suspect that the PLL_BYPASS or PLLB pin will cause that the PLL will not be used for the internal clock signal. Rather, a clock signal could be directly driven into...
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    how to un-selected device in cadence

    You can select multiple objects, press 'Q' to get the properties, and adjust the drop down menus at the very top of the window to make the action apply to all the objects you've selected.
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    add third part component in cadence

    Try using wget or curl
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    path thru terminal / spectre -W

    Try typing "spectre -W" Another way to get at the info is by the 'which' command. But, if neither of those work, then I recommend asking whoever was supposed to install spectre in the first place. If you are really desperate, you can try: find /. -name "spectre" -print
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    what's the newest version of ocean reference?

    Why do you want to know? I'm not sure, but after playing around a few seconds it looks like that ocean is actually integrated into Virtuoso. So, then, I'd assume that the ocean version, though separate, will track with Virtuoso. I say this because the way my system basically launches ocean is...
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    Linus red hat computer in lab

    Translation: "Hello. We use Red Hat Linux in our lab. What applications can we develop using it? How is it better than Microsoft Windows?" That is a very broad question. The question is also very subjective. To be brief and clear, you can do anything with Linux that you can do on Windows...
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    How to find out absolute address of variables in Keil

    I'm using the Keil compiler for an Arm-Cortex-M3 with a code and a project which I am not deeply familiar with. It compiles code the C code into a rom file suitable to be read into a Verilog rom model. I am simulating the Verilog code with the rom file. For the sake of debugging, I'm curious...
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    counting consecutive zeroes in 32 bit and shifting in one cycle

    Here is the same thing but expressed in a more brief way. One downside is that it's harder to guess what the hardware would look like. //Assuming that in and out are defined elsewhere //Assuming parameter size is defined elsewhere as 32 function integer countZeros(input [size-1:0]...
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    [SOLVED] Group 1bit Adders in Design Compiler

    Well, then I'd say you have pedagogical concerns and not practical concerns. To answer your original question: It won't hurt or help a bit.
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    [SOLVED] Group 1bit Adders in Design Compiler

    I'm not a synthesizer expert, but I'd think that putting the addition operation into the code is the only sure way to signal any synthesizer that you intend the addition operation to be performed. Synthesizers (and all cad software) are pretty dumb. If this is for learning, then what you are...
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    How to run LVS with out calibre's v2lvs

    The problem is that the Verilog netlist doesn't have all the information required to do LVS. It doesn't have power and ground connections. (You can get those in the netlist, but lets save that for later) The next problem is that it is unlikely that assura will eat Verilog. What you must do...

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