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Hi can anyone give me the spec needed for 576x720 100hz
Pixel clock:
H_frontporch
H_sync
H_backporch
V_...
or a set of formulas and i will calculate my self
The resoultion is 576×720 from a pal camera.
The monitor is a dell pc minitor with cbvs input.
It is a project for my exprince in vhdl
Is there a 800 total pixels wide (720 active) by 625 total lines (576 active) at 50Hz vertical refresh rate ?
thank you very mach for your reply has been a great help.
1. Deinterlacing: my method of deinterlacing is line dubbling menning i'm going to display twice every line.
2. PAL: 625 lines(576 active) by 1728pixels(720 active) in BT.656 digital protocol, wich comes from ADC-adv7180 chip.
1 PAL...
Thanks for the reply but i all ready saw this tread and my problem is with the timing and resoultion... and the replys in the tread don't cover it..
The second link you gave aproved what i thought, using 800x600 100hz in vga will probbly give the best solution but in order to use this resoltion...
I have no problem syncing to my pal income i have a problem finding the right frame ratio in tge vga part that will fit the incoming pal rate i preper to deinterlace the pal using line dubbling for evry field
So i need a vga rate that will alow me to intrlace properly but for now i am serching...
Hello
I am doing a project using TERASIC DE2 board to convert pal 720×576 to vga.
I am using the adv7180 for pal adc and adv7123 for vga dac.
I have a problem finding the right resoltion of vga wich will be good for pal conversion
1 frame of pal is 0.04s but i cant seem to find the right...
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