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Recent content by babbage

  1. B

    Avalanche & tunneling & punchthrough effect

    Short channel, punch through; Long channel, avalanche;
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    how 2 improve the systematic offset of this folded cascode

    maybe u should increase the gain.
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    can u tell me some good papers for undervoltage lockout circ

    normally, the key point of uvlo is the timming, not circuit itself.
  4. B

    Why low value cap is placed in parallel to diode in SMPS?

    low value cap in order to kill the high-freq ring Added after 1 minutes: u can serach the related application information-subber circuit from TI.
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    Help me building DC boost converter

    how to build a dc to dc boost converter? there are many material in this web, and u can search these by yourselef. If u still have quesitons, let's talk.
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    can u tell me soft start techniques papers for dc-dc convert

    I don't find these more material yet. But we can talk about this topic.
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    "Simplified" battery spice model

    Sure, remember to add one equal-series-resistor. the detailed par should be got to search the relevant battery introduction.
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    Articles, ieee papers and books related to buck converter

    buck converter In fact, there are many many material and/or book or pdf about dc-dc. The key should base on your current level to choose the related material, step by step to improve.
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    How to use IO PAD for analogue node's voltage testing?

    IO PAD for analog test why not to use op-buffer
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    Documents about LDO design

    ldo thesis Me too, can u send me the ph d. thesis of Rincon-Mora and his ieee paper in "current efficient , low voltage , low drop out regulators". Thanks, let's go together. My mail addresss: babbage.song@gmail.com
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    question on error amp design (OTA or OP)

    In fact, I think tat it is not easy to explain this. Maybe u can ct me by mail, babbage.song@gmail.com
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    quetions in buck DC to DC converter

    there are two methods: 1. to add the snubber circuir in order to reduce this ring freq and amplify; 2. to short the inductor when both mos are off, then SW will be equal to output voltage; Added after 2 minutes: there is another 3 method like gevy said: to open the Nmos, but lost the...
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    Compensation issue in buck DC/DC design

    DCDC design issue internal compensation is almost same as the external compensation. Loop stability issue
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    How to perform the Monte Carlo simulation in Analog Design Environment?

    Monte Carlo How to get the monte carlo model? from fab? or pls give me one this model example, 3x!
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    The difference of analog control and digital control DCDC?

    pls give the detailed information! Added after 3 seconds: pls give the detailed information!

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