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Hi,
I am trying to figure out how I can make a package for a connector device I have made where only two of the four pins are present in the pcb package.
Basically I have a new schematic part I have made to represent both sides of a PCB wire to board connector - one side sits on the PCB and...
I had a brainwave this morning, tried it out and it solved my problem!
I don't know if it is applicable to the 12f series but in the 18f series one of the config bits defines whether to use extended CPU instruction set or not. I had not specified whether to set or unset this bit. It appears...
Hi Kripton,
I have also found that the PIC Simulator in Proteus simulates well but when realised in hardware the same hex file does not work as expected. Initially all indications are that the hardware is at fault, but I soon realised that the hardware was absolutely fine (tested by writing a...
I haven't actually used the opamp yet so that will not be the problem. It is only in the design to buffer the signal for driving the follow on circuit so it will not pose a problem. At the moment I am just scoping the signal accross the inductor.
FvM - Are you sure you mean current? An inductor...
You can generate a DS using an RLC circuit (see wikipedia) and driving it with a square wave. You should probably buffer the output with an ideal buffer too. The only problem you will have is that the DS will reverse polarity on each clock edge (positive will make the first oscillation go...
Hi all,
I have been trying to create a circuit that has a very fast rise time (in the order of 10ns) but with a relatively slow fall time (prefereably as high as possible in the range 500ns to 4ms).
The reason for this is so that I can drive an RLC circuit with a positive going edge only...
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