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Recent content by atul799

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    about mentor graphics eldo rf simulator

    Re: about mentor grphics eldo rf simulator EldoRF is a Harmonic balance based RF simulator, .sst is the analysis command and fundamental is the frequency of interest, nr of harmonics to include,are roughly speaking (for simulation purposes) for accuracy, about 10-15 should be fine for accuracy...
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    [ADiT] How to call Verilog-A in ADiT?

    .verilog <valog_filename> should do it..
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    Require: any advices about LDO and charge pump design

    for the charge pumps start to look for dickson and the derivative structures.looks for papers related to Flash memory designs.for high current requirements look for nor flash drain pumps.don't have citable references now.
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    a urgent case about chargepump

    to clamp voltages use (HV) nmos in diode configuration(gate tied to drain) as of them many in series as many vt higher/lower clamp you want.
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    Looking for info about SRAM timing circuits

    can someone give info on the timers used in large sram arrays to synchronize the precharge(enable and disable),sense amp enable and disable in the same clock period. to use dummy slices or sdls to genrate the timers etc...
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    what's the difference betw. SRAM & register file?

    sram or register array regsiter files are not necessarily composed of flip flops.in general RFs are basic Sram cell with more than one port (separate read write port or more than one read write port ) there are different prefferred implementations in one basic sram cell is used(RF compilers)...
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    What is the flash memory ?

    Re: flash memory mirrorbit/twinflash is essentially another technology wherein charge is trapped not in floating gate but in a ONO layer over gate of transistor.specifically for mirror bit, it is a virtualgnd NOR array but can be tricked to use it as a NAND as well(though not a good idea in my...

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