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I guess, NC-sim lost its mind, It forgot the right hand side concatenation which forces the bit 9 of lnbuf_m0_ADDR_d = 0.
In your always block, when lnbuf_m0_ADDR changes, the right hand side of your assignment is evaluated before the delay.
The simulator uses a temp variable to store...
sv_seghandler
Does anyone know what's wrong ? The simulation ran
on linux REDHAT 7.3 with Cadence 5.0, ncsim 5.0, gnu gcc 3.0.
I did try with Cadence 5.1, but it doesn't help. Try with gcc3.1, it doesn't
help either.
But my design ran successful on HP machine.
The error message is as...
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