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Recent content by ASICK

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    What's your thought on this??

    Hi Guys, I anted opinion of all the experts out there, which is the best DRC, LVS and XRC tool, why, and what are the major issues and barriers. Thank you for your comment Asick
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    How to test ADC in Cadence/Matlab?

    Can someone tell me in detail how to test the adc? I want to input sin wave and the run FFT/DFT on it, how to implement this in cadence or matlab? I will really appreciate your help, please help, Thanks,
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    Cadence Tools - Which Linux do you advise???

    isuggest use larger partition like 30GB+ as if ur circuits gets big, so does the transient data space, i use close to 3GB for each simulation run for ADC
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    How imp is CMFB for fully diff OTA

    Really!! have you tried it and it worked without CMFB? I have wasted a lot of time on it, so wanna make sure before I give it another shot :-) I have a high swing bias(with drain tapped to the gate of the bottom nmos), but I tried everything, even running a multisweep to get the values of xtors...
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    How imp is CMFB for fully diff OTA

    Hi all, I want to know if its possible to make a fully differential folded cascode to work without common mode feedback ckt, I mean, I just cannot get to DC bias the OTA without the CMFB, it either goes to rail or gnd at the output without it, is it supposed to do so or is it s'thing wrong with...
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    Berkeley EE247 projects

    ee247 berkeley Does anyone has the class projects of EE 247 A/D class? I could use some pipelined a to d class or masters projects/thesis, if you have any other please post them, i really need some ideas at x-tor level implementation, will donate all my points if helpful(not that i have a lot)...
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    how to measure output swing

    .tran doesn't work, and if I do .dc sweep, the output hardly moves over the range, is it good or bad?
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    how to measure output swing

    I want to know what are the best analysis setup in spectre to measure the output swing of a diff amp in openloop and closed loop configurations. I am not sure about the method I am using as my result doesnt match my hand calc, any ideas??
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    Which book is better to start with?

    razavi and John&Martin are probably the best. the discuss most of the basic analog circuits
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    Analysis and design of analog intergrated circuit

    send me your email and i can mail it to you as a zipped file
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    help needed,Stability analysis and noise analysis

    I need help with the Stability analysis and noise analysis, as how to run these using Spectre in cadence. 1. During stability analysis, what to choose for probe instance, and how does this analysis work? if you could explain that will be great. 2. During noise analysis, there are 2 options...
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    please help, with aptivia

    Hi, when I try to run aptivia on a design, it fails saying "simulation did not start" Error:/Cadence/Aptivia/tools/acv/common/perl/bin/perl: error while loading shared libraries:libdb.so.3: cannot open shared object file:No such file or directory I have IC5033, on RH8.0, I have the link to...
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    resolution in Linux redhat8.0

    Hi all, I have installed redhat8.0 on my laptop, using VMWare, my windows uses resolution of 1280X800 but linux only works for 800X600 or below, after that it says "my host doesnt allow this resolution to run in fullscreen SVGA" is there a way to get the same or at least better resolution in...
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    please help...redhat 8 or 9 for cadence 5.0.3.3???

    I have redhat 8.0 with IC5.0.3.3 on it. I want to use redhat 9, so I can have my graphic card working instead of using generic vesa driver and get better resolution (I have radeon mobility 300X)I was wondering if I should install redhat 9.0 and install cadence on it, or if I could possibly...
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    Whats wrong with this ckt??

    Hi I am trying this folded cascode, like in P allen, I cant get it to work, my pmos on top not in sat, where am I going wrong?? please help, thanks. here is a little script of how I tried it, transistor number here match the ones in schematic Vdd=2.5;Vss=0...

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