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Recent content by ashyma

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    [SOLVED] finding cutoff frequency of a bandpass filter from simulation curve

    Thank you every one
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    [SOLVED] finding cutoff frequency of a bandpass filter from simulation curve

    I am very confused regarding the cutoff frequency: i want to find the cutoff frequency of a bandpass filter from the simulation curve... lets say the gain is 41.8dB so what is the 3db cutoff frequency ? I have attached a curve for reference ,,, thanks
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    how to design PMOS pseudo resistors

    hello.. i am trying to design PMOS pseudo resistors in low noise low power CMOS neural amplifier like this one: **broken link removed** my problem is there isnt much explanation in the paper regarding the design of the pseudo resistors.. i tried searching but i couldnt find much.. so does...
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    [SOLVED] LTspiece simulation problem

    I am trying to simulate a circuit in netlist using LTspiece... i need to plot the Iout vs the differential voltage input.. so any ideas on how to change the x-axes on LTspiece... i read that this can be done in the simulation itself by using Voltage dependent voltage source.. thanks
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    [SOLVED] Problem with designing an OTA using 90nm technology

    even when using traditional CMOS design...the response is even worse for both linearity and gain - - - Updated - - - i didnt mean to cross post.. i am new to the forum... my other post i was asking about smthg else and then one of the members asked to to elaborate... i apologize for not pay...
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    [SOLVED] Problem with designing an OTA using 90nm technology

    I have a major problem and i am out of ideas so any suggestions will be great.... below is the image of the circuit i am trying to simulate: its for an OTA using 90nm technology: the requirements are 1. high linearity 2. high gain 3.low noise... the only difference in my circuit from the one...
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    [SOLVED] increasing the linearity range f an OTA

    ok thanks a lot really appreciate ur help... do you have a book in mind that i can check.. thanks again - - - Updated - - - ok really thanks for your reply.. but i have a question what do u mean with "assure transistors current carrying capacity"... how to assure this please .. what teat to...
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    [SOLVED] increasing the linearity range f an OTA

    varunkant2k ... no i just assumed the Ibias to be 4 u... so do u have any suggestions on how to calculate it... i assumed it and through it i calculay=ted the VSG for the transistors and the aspect ratios - - - Updated - - - ahmad1954.. for the linearity range using LTspiece or PSPECE... u...
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    [SOLVED] increasing the linearity range f an OTA

    i ahd to remove it ... sorry for that
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    [SOLVED] increasing the linearity range f an OTA

    thank you for your help... i am using passive resistors but i am not getting the linearity range that i want.. i recalculate the aspect ratios of the transistors.. but the linearity range is still somehow small
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    [SOLVED] increasing the linearity range f an OTA

    I am designing an OTA but i am getting a very small linearity range... i need to increase the linearity.. I added passive resistors at the differential pair but i am not getting any improvements... so any ideas??? Thanks
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    Design problem: Need to design a Low-Power Low-Noise CMOS Amplifier for Neural Record

    hello everyone=) currently I am trying to re-simulate the results obtained in the paper: R. R. Harrison, “A low-power, low-noise CMOS amplifier for neural recording applications,” in Proc. IEEE Int. Symp. Circuits and Systems,vol. 5, 2002, pp. 197–200. But i am having huge problems:( 1- I...
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