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Recent content by ashoaibus

  1. A

    VERILOG_Adding two single BCD digits

    Thanks for your reply: I am in need of a VERILOG code that allows to add two BCD digits and the out put of this should be BCD as well and a code allows implementing a circuit that subtract two BCD digits but by using 10s complement.
  2. A

    VERILOG_Adding two single BCD digits

    Could you please help me finding a VERILOG code to add two BCD digits where the output should be BCD as well.
  3. A

    Verilog code implementing ALU using if statment

    Hello all, I am in urgent need to VERILOG code that implement ALU [3 input + 4output] the ALU produces different outputs for ex, for input 011 the output is B-C for input 110 the output is A nor B nor c
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