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I already run the sims under same directory as the path defined above, which i can use ADE calculator to print Vth for each sim correctly. I try to use ocean script to collect Vth for each sim, to make a vth-L plot. But it dosen't work since the vth_ns and vth_ps value is always the first...
Hi all,
I am trying to use ocean to print Vth-Length waveform. What i do is to use ocean to submit a series simulations with dc OP simulation, and then open each result and print the vth value.
But vth value keep the same with my script. When i run this script, vth_nm or vth_pm is always...
My boss asked me to spread the spectrum of clock, to get better EMI performance.
But i don't know where to find the basic theory of it.
I've found in papers that there are different ways to do it, for example, random modulation and chaotic modulation. But most of them don't give out the...
Seems the theme of my last post is not so popular...hehe
My question is how to describe the external mosfet? Now i just get the spec of external mosfet, but there are some parameters confusing me, Qg, Qgs, Qgd--(gate charge), Cin, Cout, Creverse--(tested @ 1Mhz). I've seen a model file of a...
boost dc-dc external mosfet
Hi all, I am trying to design a gate driver of external switching mosfet of a SMPS. The whole circuit is actually a boost DC-DC, but working in a open loop condition, no feedback from output. If given a 50% duty cycle, a 2*Vin is expected at the output. No...
In razavi's book, there is a sentence saying that vth decreases as L decreases...
but i think your opinion looks reasonable, can you give some examples of actual processes? thanks very much!
1. how to simulate input-refered offset ?
we know there are systematic offset and random offset.
If i simulate the opa in a real-used loop, while all the nodes' voltages are set through feedback, does the input differential voltage in this case equal to the systematic offset?
And is the...
once some one said that there was confusion with Allen's method, and he took PSRR for example. But i forget what exactly the problem is, so i still use Allen's way generally :)
Re: cmos pll
what are the PLL's specifications if i attempt to design a a cmos pll for frequency synthesizer using in wireless communications based on WCDMA or CDMA2000?
I want to have a try on it for my last year project, but i am a learner, i also want to know how difficulty and how long...
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