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Sorry I forgot what device this was, but still pin 1 could be a clock I haven't seen the schematics. Pin 16 is a divide by two of pin 1? OE is really tristate? As I found out myself you will have try things yourself, You are lucky you have received more advice than I got in my thread :-)
I'm a newbie too but it looks to me like pin 18 is a copy of pin 1 which is a clock and then pin 16 is a copy of pin 18. The output on pin 18 will be output one clock later than the clock input on pin 1 but will be the inversion of pin1 and pin 16 will be the same? as pin 18 but delayed by one...
This thread is turning into a blog of just me talking to myself :-)
Yesterday while testing out of circuit with my Boardmaster I found two sneaky illegal states that my PALCE substitute wouldn't recover from. The simulator in PALASM wasn't able to duplicate this. I made a few changes to my code...
I've just managed to get something working with this second pal (signals shown in post above) and am tweaking it now to check it recovers from illegal states like the original etc.
This one was much more difficult and was exacerbated by the fact that my logic analyser seems to be pulling the...
It looks like the vcc lines correspond to the parts of the jedec file that all have the value 1, so you can try removing those vcc from the equations. They are probably not required, but I haven't used opjr myself. I don't know if you have to declare everything, the software should be able to do...
The vcc part could mean tri-state( or maybe output enable ) because your device has I/O pins? Does your PAL16R4 device show vcc 4 times? I think Palasm has a disassembler so I will try your jed file in that later.
EDIT:
If your devices are read protected they should show all 1's or 0's (0 I...
I was suggesting that you may be able to detect solder shrinkage by only soldering one side of the part and leaving it to cool.
Because these packages are for wave soldering or more likely these days for paste, when you hand solder them you will be applying solder higher up the part and this...
If you can you could try soldering only one side of the diode and wait for it to cool down for a while and then see if there is a gap between the other side of the diode and the pad. The gap might be very small so you may need something thin to try to slide under it when it's still hot and then...
How about this one then? The signals I'm trying to generate are PC0 and Pin 16. I think I've worked out the others.
Inputs are CLK IN an SMPTE. It looks like Pin 19, 18 and 17 are CLK IN divided by 2, 4, and 8 respectively. Pin 15 is SMPTE offset by 1 CLK IN and Pin 14 is Pin 15 offset by 1...
OK, so I managed to get something working for my second PAL no thanks to Wincupl which wouldn't give me valid JEDEC files and the simulator wouldn't work using state machine equations. The only way I could get it to work was to compile my source and then copy the logic equations from the...
I'm not having much fun with this. I decided to just try and be simple and get something to count up to 79. Theoretically this should do it and I'm sure I had it working the other day. I'm struggling with syntax. There's 20 different ways to do everything in the Wincupl manual but none of the...
I need to duplicate a PAL16R8 that counts from 0 to 79. I will be fitting this on a PALCE16V8.
When START goes high we start counting from 1-12 over 12 clocks, then START goes low for one clock and we get 13 output, then START goes high for 2 clocks and we get 14 and 15, then START goes low for...
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