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Recent content by Apollo13

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    Query: Power MOS in a LDO

    ldo linear region Hi All, I have a small query, please help in sorting it out. Is it a must to have the power mos of a linear regulator in saturation region. e.g Vin=1.5V Vout=1.2V Iload=800mA
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    Subthreshold analog design

    subthreshold analog design Hi All, Could some one give me name of a book that deals with designing analog circuits in subthreshold region of opeartion for mOS transistor. I have been going through IEEE papers on the same but am unable to get a clear picture thanks in advance
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    Suggest me a paper/reference book about ac-dc converters

    Re: about ac-dc converter search for a thesis in umi. If you find one it can be arranged
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    Mos gate capacitance-serious doubt -help sought

    Hi Venkatesh, we have mos cap work in 2 modes. depletion and enhancement. In depletion mode the cap is b/w gate and substrate and it is wlcox. So you know the plates. In enhancement mode the cap is between channel (drain and source) and the gate. Beyound vt again it is w*l* cox If you have a...
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    What are your specs about the BANDGAP?

    Are you saying that you could reduce 1/f noise by redicing the BW of the buffer. I haver not read or heard any technique that could reduce 1/f noise by BW reduction. The buffer would in your explanation work more like a filter if I understand your explanation right. And no filter exsists that...
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    Looking for paper about designing Power On Reset

    Re: Design of POR you could go here search in ieee study paper, ambreesh has posted them
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    What are your specs about the BANDGAP?

    Hi tsanlee There is nothing as DC PSRR and no BGR datasheet mentions line regulation as DC PSRR. Next your BGR output is varving by 50mv under what conditions. Is it line regulation. Or is it temperature related or process variation. Also the noise source which is majorly low -frequency...
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    Where can I find papers to design precision low-drift amp?

    Re: Where can I find papers to design precision low-drift am could you clarify what you mean by low drift. Rather drift is related to which paramater of the amp. UGB, Gain, Power
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    What does this sentence mean?

    As per my understanding, a macromodel od the design is generated. This is nothing but a transfer function. Obviously the transfer function is not exact, but a close approximation of the circuit. So one would observe the difference in results from actual circuit and polynominal model of the circuit.
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    What are your specs about the BANDGAP?

    Do you mean line regulation as DC PSRR? Or how do you define DC PSRR. PSRR as far as I know is related to small signal so has to be AC.
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    Voltage reference for RF circuits

    Hi , Correct me if I misunderstood, So we take care on board level but not on the circuit level. And how would we deal with things when I need the same reference in a RF chip.
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    Voltage reference for RF circuits

    rf voltage reference Hi All, is a voltage reference for rf circuit same as for any other analog circuit. Or do we take certain extra precautions for one in rf design. Are their special circuit techniques used .
  13. A

    need help on the design of dc-dc

    I would suggest reading of Fundamentals of Power Electronics by Dr Robert W Erickson Dr D Maksimovic
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    Is cascode different from cascade ?

    cascade and cascode What I have read says that noise performance of cascode worsens at high frequency. A cascode is always a combination of common source driving a common gate amplifier. The topology is fixed.
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    does hspice has node number limitation?

    i use hspice windows version, havent faced nodes issue. It can support upto 100000 devices as the manual says

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