Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
my problem solved
Mr Dominik Przyborowski said ::
many thanks to him . his advice helped me alot .
i put multiplier coefficient (100u * 160) so my problem was on simulation method . i should cut the feed back and put source on op amp (v-feedback)pin but i made a mistake & put the source...
when i use multiplier coefficient for this work e.g
mp 1 7 3 3 pch w=200u l=0.4u m=80
to reach w=16000u my given result will be completely different .as u know when u multiple some transistor the capacitors will be rise in proportion m . and ro (drain/source resistance) will be reduce...
i think my library has problem and doesn t support nf parameter
i use number of fingers nf=80 as my max w size is 200u to simulate 16000u as below
mp 1 7 3 3 pch w=200u l=0.4u nf=80
but hspice warn job aborted!!!!
have u got 0.35u tsm.c lib ??
i simulate it as u said .but recieved this...
No it s not stupid work !!
please read this articles carefully then u ll see it s not crazy !
1-Full On-Chip CMOS Low-Dropout Voltage Regulator (Robert J. Milliken, Jose Silva-Martínez, Senior Member, IEEE, and Edgar Sánchez-Sinencio, Fellow, IEEE)
2-A Frequency Compensation Scheme for LDO...
i try to simulate a low dropout voltage regulator circuit that includes a pass transistor whith w=16000u l=0.4u
when i want to simulate it, hspice shows that w is exceed wl max .
my highest wmax in library is about 200u
anybody have tsmc 0.35u model or lib that includes mosfet with wlmax=...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.