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Recent content by andrew_que

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    [SOLVED] Failing to program ALTERA Max 7000A

    I see thanks a lot By the way I noticed that trying to understand how does a standard interface work by reading the official technical documentation is an extremely tedious job. Is there some other standard practice to learn in a simpler way? Like I can imagine learning the general functioning...
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    [SOLVED] Failing to program ALTERA Max 7000A

    OK so correct me if I'm wrong. Looking at the waveform of FvM and the picture of TAP FSM I can tell that JTAG stays in reset state for the first six 1s of TMS, then goes to idle for one clock cycle, then "select DR scan", "capture DR", "shift DR" and from there it remains in that state. During...
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    [SOLVED] Failing to program ALTERA Max 7000A

    Thanks Indeed pin 23 and pin 10 need a robust connection. For testing, I used the "resistor leg" technique. Now that I know how to make it work I will make a pcb similar to the one in the link posted by Akanimo.
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    [SOLVED] Failing to program ALTERA Max 7000A

    I looked for the datasheet of that breakout board but no results. The board reads this: PLCC44-DIP40 78E/89C 51/52/58 SERCOND. Anyway according to altera datasheet TCK goes to pin 32. Thank you for your measurements. I didn't know about TMS sequence, thought it was just an active low enable...
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    [SOLVED] Failing to program ALTERA Max 7000A

    I got that breakout board from another piece of equipment I bought some time ago - a 40 pin flash/eeprom universal programmer. Indeed it is not the same as a regular dip44, unfortunately I don't have a schematic and I had to probe each pin with a multimeter to find where to connect stuff. I...
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    [SOLVED] Failing to program ALTERA Max 7000A

    You have fine eyes, It is PLCC44 to DIP40. Of the 4 pin missing, 2 were GND and VCC. To overcome this I "implanted" the leg of a resistor in the right places, thin enough to get stuck firmly. Checked continuity also to neighbouring pins, it is fine Also the red wire is fine and dandy - just to...
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    [SOLVED] Failing to program ALTERA Max 7000A

    @FvM - Yeah usb blaster waveforms look very suspicious. I knew it is a chinese ripoff. It came with a cyclone IV chinese devboard, bought about 2 years ago, almost never used. The thing is I could program correctly the fpga, but now that i try again I get the same error so.. very probably the...
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    [SOLVED] Failing to program ALTERA Max 7000A

    @FvM: - I checked with a multimeter both TDI and TDO impedance to ground in all possible configuration of JTAG and VCC connected/disconnected, always getting high impedance. - Yes i bought new CPLDs (from RS components online distributor) - TDO @ 0V was indeed in my previous configuration, now...
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    [SOLVED] Failing to program ALTERA Max 7000A

    Hello all, thanks for the replies @ads_ee: - I did connect only one VCC and one GND. I have fixed this and also added bypass caps and a pullup resistor - Sorry you are right, I have updated my schematics to fully show my breadboard connections. Only one note, where eagle part shows pin 3 is...
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    [SOLVED] Failing to program ALTERA Max 7000A

    Hello everyone. I recently bought a bunch of Altera MAX 7000A CPLDs on RS components in the plcc44 package. I already have at home one of those cheap clones altera usb blaster with JTAG output. I tried a simple breadboard setup to program the cpld with altera quartus without success. First...
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    Cyclone IV learning board

    OK thank you very much, then I'll be focusing on price and documentation. I found a Xilinx spartan 6 based board from numato lab which is nicely documented and seems to offer much more performance at a slightly lower price with respect to that cyclone with 9k logic elements instead of 6k, and 6...
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    Analyzing a differential amplifier.

    Nothing is preventing you to apply your AC signal on top of the DC biasing voltage to have oscillations around that point just by cascading the two sources. Depending on the simulator, you might in fact find a parameter named DC inside the AC generator. In a more realistic situation you can AC...
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    Cyclone IV learning board

    Hello guys, I'm very sorry if this is not the right section, this question doesen't strictly regard FPGA design but I didn't find a better place. So I wanted to learn about VHDL and FPGAs to bring to the next level my projects, although FPGA are usually very expensive, I found this cheap fpga...
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    Input reflection coefficient

    Turns out there were still a couple of problems on top of that that made the flowchart wrong: 1 - No need to add the (1-s11) branch: it is implicit in the definition of s21 2 - The node I marked C is actually a2 whereas B is b2, so a branch s22 connecting the two nodes is missing Thank you very...
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    Input reflection coefficient

    I already thought about that but never tried because I'm missing something here. Here I made some hand calculations. If everything is fine and I use the right value for \[\Gamma_S\] (which I don't know) I should be able to retrieve the previously mentioned formula. So I tried to solve for...
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