Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by andrabi

  1. A

    Mismatch analysis of bandgap

    thanks alot for the help..but then wat i exactly want is the expression for the mismatch effect in the o/p current or voltage in the bgap due to transistors..and then i ll put the values from foundry to get the spread
  2. A

    output res vs voltage swing

    and higher the output resistance higher the gain..which limits the input voltage swing
  3. A

    hi there I want to learn how to make low power design

    and yeah to add to the existing ponts.. i..u can use gated clocks.. ii..use high vt Mos to minimise leakage iii..and spread the ciruits horintally rather than vertically e.g avoid usin cascodes instead use opam for high impedance that cascodes provide
  4. A

    Mismatch analysis of bandgap

    thanks a lot ..i already had the paper.. but this doesnt analyse the conventional bandgap with opamp an all..thanks anyway
  5. A

    clock slicer and comparator design

    i need to design the circuit...
  6. A

    clock slicer and comparator design

    (i)Any ideas on clock slicer circuits... (ii)Generally a comparator is used for the purpose but how do generate an operating point for an opamp comparator...becoz there is no feed back..
  7. A

    Mismatch analysis of bandgap

    bandgap vt mismatch Does any body have papers on mismatch analysis of apamp based bandgap... thanks
See more

Part and Inventory Search

Back
Top